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www.irf.com 1 3/26/04 notes through are on page 10
irlr4343irlu4343 irlu4343-701 i-pak leadform 701 irlu4343-701 refer to page 10 for package outline d-pak irlr4343 i-pak irlu4343 features advanced process technology key parameters optimized for class-d audio amplifier applications low r dson for improved efficiency low q g and q sw for better thd and improved efficiency low q rr for better thd and lower emi 175c operating junction temperature for ruggedness repetitive avalanche capability for robustness and reliability multiple package options description this digital audio hexfet ? is specifically designed for class-d audio amplifier applications. this mosfet utilizes the latest processing techniques to achieve low on-resistance per silicon area. furthermore, gate charge, body-diode reverse recoveryand internal gate resistance are optimized to improve key class-d audio amplifier performance factors such as efficiency, thd and emi. additional features of this mosfet are 175c operating junction temperature and repetitive avalanche capability. these features combine to make this mosfet a highly efficient, robust and reliable device for class-d audio amplifier applications. s d g v ds 55 v r ds(on) typ. @ v gs = 10v 42 m r ds(on) typ. @ v gs = 4.5v 57 m q g typ. 28 nc t j max 175 c key parameters absolute maximum ratings parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t c = 25c continuous drain current, v gs @ 10v a i d @ t c = 100c continuous drain current, v gs @ 10v i dm pulsed drain current p d @t c = 25c power dissipation w p d @t c = 100c power dissipation linear derating factor w/c t j operating junction and c t stg storage temperature range clamping pressure n thermal resistance parameter typ. max. units r jc junction-to-case CCC 1.9 r ja junction-to-ambient (pcb mounted) CCC 50 c/w r ja junction-to-ambient (free air) CCC 110 -40 to + 175 CCC 7939 0.53 max. 1980 20 5526 downloaded from: http:///
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s d g electrical characteristics @ t j = 25c (unless otherwise specified) parameter min. typ. max. units bv dss drain-to-source breakdown voltage 55 CCC CCC v ? v dss / ? t j breakdown voltage temp. coefficient CCC 15 CCC mv/c r ds(on) static drain-to-source on-resistance CCC 42 50 m ? CCC 57 65 v gs(th) gate threshold voltage 1.0 CCC CCC v ? v gs(th) / ? t j gate threshold voltage coefficient CCC -4.4 CCC mv/c i dss drain-to-source leakage current CCC CCC 2.0 a CCC CCC 25 i gss gate-to-source forward leakage CCC CCC 100 na gate-to-source reverse leakage CCC CCC -100 g fs forward transconductance 8.8 CCC CCC s q g total gate charge CCC 28 42 q gs pre-vth gate-to-source charge CCC 3.5 CCC v gs = 10v q gd gate-to-drain charge CCC 9.5 CCC i d = 19a q godr gate charge overdrive CCC 15 CCC see fig. 6 and 19 t d(on) turn-on delay time CCC 5.7 CCC t r rise time CCC 19 CCC t d(off) turn-off delay time CCC 23 CCC ns t f fall time CCC 5.3 CCC c iss input capacitance CCC 740 CCC c oss output capacitance CCC 150 CCC pf c rss reverse transfer capacitance CCC 59 CCC c oss effective output capacitance CCC 250 CCC l d internal drain inductance CCC 4.5 CCC between lead, nh 6mm (0.25in.) l s internal source inductance CCC 7.5 CCC from package avalanche characteristics parameter units e as single pulse avalanche energy mj i ar avalanche current a e ar repetitive avalanche energy mj diode characteristics parameter min. typ. max. units i s @ t c = 25c continuous source current CCC CCC 26 (body diode) a i sm pulsed source current CCC CCC 80 (body diode) v sd diode forward voltage CCC CCC 1.2 v t rr reverse recovery time CCC 52 78 ns q rr reverse recovery charge CCC 100 150 nc v ds = 25v, i d = 19a v ds = 44v v dd = 28v, v gs = 10v integral reverse ? = 1.0mhz, see fig.5 i d = 19a r g = 2.5 ? v gs = 0v, v ds = 0v to -44v mosfet symbol showing the see fig. 14, 15, 17a, 17b typ. CCC conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 4.7a t j = 25c, i s = 19a, v gs = 0v t j = 25c, i f = 19a di/dt = 100a/s v gs = 0v conditions p-n junction diode. v ds = 50v and center of die contact max. 160 v ds = 55v, v gs = 0v, t j = 125c v gs = 20v v gs = -20v v gs = 4.5v, i d = 3.8a v ds = v gs , i d = 250a v ds = 55v, v gs = 0v downloaded from: http:///
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fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 6. typical gate charge vs.gate-to-source voltage fig 5. typical capacitance vs.drain-to-source voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60s pulse width tj = 25c 2.3v vgs top 15v 10v 8.0v 4.5v 3.5v 3.0v 2.5v bottom 2.3v 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60s pulse width tj = 175c 2.3v vgs top 15v 10v 8.0v 4.5v 3.5v 3.0v 2.5v bottom 2.3v -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 19a v gs = 10v 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 10000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 1 02 03 04 0 q g total gate charge (nc) 0 4 8 12 16 20 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 44v vds= 28v vds= 11v i d = 19a for test circuit see figure 19 0 2 4 6 8 10 v gs , gate-to-source voltage (v) 0.1 1.0 10.0 100.0 1000.0 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) v ds = 30v 60s pulse width t j = 25c t j = 175c downloaded from: http:///
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fig 11. maximum effective transient thermal impedance, junction-to-case fig 10. threshold voltage vs. temperature fig 9. maximum drain current vs. case temperature fig 7. typical source-drain diode forward voltage fig 8. maximum safe operating area 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 v sd , source-to-drain voltage (v) 0.1 1.0 10.0 100.0 1000.0 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 0 1 10 100 1000 v ds , drain-tosource voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec 25 50 75 100 125 150 175 t j , junction temperature (c) 0 5 10 15 20 25 30 i d , d r a i n c u r r e n t ( a ) -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 0.5 1.0 1.5 2.0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250a 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) i (sec) 1.359 0.001350.5409 0.003643 j j 1 1 2 2 r 1 r 1 r 2 r 2 c ci i / ri ci= i / ri downloaded from: http:///
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fig 13. maximum avalanche energy vs. drain current fig 12. on-resistance vs. gate voltage fig 14. typical avalanche current vs.pulsewidth fig 15. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 14, 15:(for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type.2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 17a, 17b. 4. p d (ave) = average power dissipation per single avalanche pulse.5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 14, 15). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 100 200 300 400 500 600 700 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 2.4a 3.3a bottom 19a 2.0 4.0 6.0 8.0 10.0 v gs , gate-to-source voltage (v) 0 50 100 150 200 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ? ) t j = 25c t j = 125c i d = 19a 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 tav (sec) 0.1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav assuming ? tj = 25c due to avalanche losses. note: in no case should tj be allowed to exceed tjmax 0.01 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 20 40 60 80 100 120 140 160 180 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1% duty cycle i d = 19a downloaded from: http:///
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fig 18a. switching time test circuit fig 18b. switching time waveforms v gs v ds 90% 10% t d(on) t d(off) t r t f v gs pulse width < 1s duty factor < 0.1% v dd v ds l d d.u.t + - fig 17b. unclamped inductive waveforms fig 17a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 19a. gate charge test circuit fig 19b gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 16.
for n-channel hexfet power mosfets
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? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period

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6.73 (.265) 6.35 (.250) - a - 4 1 2 3 6.22 (.245) 5.97 (.235) - b - 3x 0.89 (.035) 0.64 (.025) 0.25 (.010) m a m b 4.57 (.180) 2.28 (.090) 2x 1.14 (.045) 0.76 (.030) 1.52 (.060) 1.15 (.045) 1.02 (.040) 1.64 (.025) 5.46 (.215) 5.21 (.205) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) 6.45 (.245) 5.68 (.224) 0.51 (.020) min. 0.58 (.023) 0.46 (.018) lead assignments 1 - gate 2 - drain 3 - source 4 - drain 10.42 (.410) 9.40 (.370) notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 2 controlling dimension : inch. 3 conforms to jedec outline to-252aa. 4 dimensions shown are before solder dip, solder dip max. +0.16 (.006). example: lot code 9u1p this is an irfr120 wi t h as s e mb l y we e k = 16 dat e code year = 0 logo rectifier international assembly lot code 016 irf u120 9u 1p notes: t his part marking information applies to devices produced before 02/26/2001 international logo rectifier 34 12 irf u120 916a lot code as s e mb l y example: wi t h as s e mb l y this is an irfr120 year 9 = 1999 dat e code line a we e k 16 in the assembly line "a" as s embled on ww 16, 1999 lot code 1234 part number notes: this part marking information applies to devices produced af ter 02/26/2001 downloaded from: http:///
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6.73 (.265) 6.35 (.250) - a - 6.22 (.245) 5.97 (.235) - b - 3x 0.89 (.035) 0.64 (.025) 0.25 (.010) m a m b 2.28 (.090) 1.14 (.045) 0.76 (.030) 5.46 (.215) 5.21 (.205) 1.27 (.050) 0.88 (.035) 2.38 (.094) 2.19 (.086) 1.14 (.045) 0.89 (.035) 0.58 (.023) 0.46 (.018) lead assignments 1 - gate 2 - drain 3 - source 4 - drain notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 2 controlling dimension : inch. 3 conforms to jedec outline to-252aa. 4 dimensions shown are before solder dip, solder dip max. +0.16 (.006). 9.65 (.380) 8.89 (.350) 2x 3x 2.28 (.090) 1.91 (.075) 1.52 (.060) 1.15 (.045) 4 1 2 3 6.45 (.245) 5.68 (.224) 0.58 (.023) 0.46 (.018) week = 16 dat e code ye ar = 0 notes : t his part marking information applies to devices produced be fore 02/26/2001 example: lot code 9u1p this is an irfr120 with assembly assembly international rectifier logo lot code irfu120 9u 1p 016 international logo rectifier lot code assembly example: with assembly this is an irfr120 year 9 = 1999 dat e code line a we e k 19 in the assembly line "a" as s embled on ww 19, 1999 lot code 5678 part number notes : t his part marking information applies to devices produced af ter 02/26/2001 56 irfu120 919a 78 downloaded from: http:///
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tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl notes : 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters ( inches ). 3. outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch downloaded from: http:///
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data and specifications subject to change without notice. this product has been designed for the industrial market. qualification standards can be found on irs web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 3/04 repetitive rating; pulse width limited by max. junction temperature. starting t j = 25c, l = 0.93mh, r g = 25 ? , i as = 19a.
pulse width 400s; duty cycle 2%. this only applies for i-pak, l s of d-pak is measured between lead and center of die contact r is measured at

contact factory for mounting information limited by tjmax. see figs. 14, 15, 17a, 17b for repetitive avalanche information when d-pak mounted on 1" square pcb (fr-4 or g-10 material) . for recommended footprint and soldering techniques refer to application note #an-994 refer to d-pak package for part marking, tape and reel information. ! "#

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note: for the most current drawings please refer to the ir website at: http://www.irf.com/package/ downloaded from: http:///

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